Encoder count monitoring with PLC logic to catch lost motion

7 min read · Published November 10, 2026

While the VFD run command is on, snapshot the encoder count into a double-word register, wait one timed interval, snapshot again, and latch an alarm when the two samples are equal. Size the timer preset from the slowest commanded speed, test each logic branch at that speed, and only then wire the alarm to a stop.

An encoder that stops counting while the drive keeps running means a broken belt, a slipping coupling or a dead signal path, and the machine sits still or mispositions until someone notices. You can catch that in the PLC with four rungs and one timer. While the run command is on, a self-resetting timer marks off an interval, a pulse contact snapshots the encoder count into a sample register, and a double-word compare latches an alarm when the live count has not left the sample by the end of the interval. The reference listing starts at a K20 preset, 2.0 s on the standard 0.1 s timer base, and the worked example below shows how to size that preset from the machine's slowest commanded speed. The article ends with the three branch tests to pass before the alarm is allowed to stop the machine.

What the check catches

The observation is the encoder count. The enable is the VFD run command, Y0 in the listing. With Y0 on, the logic repeats one cycle for as long as travel is commanded: copy the live count, wait one interval, compare the live count to the copy. Equal samples after a full interval mean zero counts arrived, and rung 4 latches alarm relay C10. A frozen count is caught within about one interval, so 2.0 s at K20. The panel shows the alarm bit, and a reset pushbutton writes C100 to clear it.

Two boundaries define what the alarm means. The check watches count presence, so it says the count stopped changing over one interval; it does not check whether the count matches the commanded speed or position. It also does not name the failed part, because the belt, the coupling, the encoder and its wiring can each stop the count. The last section separates them.

What you need

  • A run command bit. Any PLC bit that is on whenever the drive is commanded to run; the listing uses Y0, the drive run output.
  • The count in CPU memory. Configure the counter input module for quadrature input and point its count at a V-memory location the ladder can read; the counter module manual's chapter on moving encoder counts into CPU memory covers that setup, and your distributor carries the current manuals. The listing names the count V2000 and the sample V2002, each double word spanning two V-memory words, so the pairs are V2000/V2001 and V2002/V2003. Confirm both addresses against your module configuration before using the listing.
  • One timer and three relays. T1 for the interval, C1 as the snapshot pulse, C10 as the latched alarm, C100 as the panel reset bit. Check that none is already used elsewhere in the project.
  • The panel side. An alarm line driven by C10 and a reset pushbutton that writes C100.
  • A safe way to isolate the drive for the controlled stopped test in the last section.

Worked example: sizing the K20 preset for a 500-pulse encoder at 3 in/min

Inputs. The encoder is rated 500 pulses per 10 in of travel, a documented figure for a linear encoder on this PLC family, and the example machine is a belt-driven linear axis running it in quadrature. Quadrature counting takes each edge of both channels, 4 counts per pulse line; confirm the multiplier in the module configuration. The slowest commanded speed is taken as 3 in/min for the example; put your own figure in. The K unit on the standard timer instruction is 0.1 s, so the listing's K20 is 2.0 s.

Rule. Counts per second at the slowest speed = pulses per inch x 4 x speed in inches per second. Size the interval to cover at least 5 counts at that speed, so snapshot timing can never leave an interval empty, and detection lands within about one to two intervals. Preset in seconds = 5 / counts per second; on the 0.1 s base, K = 10 x seconds.

Arithmetic.

  • 500 / 10 = 50 pulses per inch; 50 x 4 = 200 counts per inch.
  • 3 in/min / 60 = 0.05 in/s; 200 x 0.05 = 10 counts per second.
  • Minimum preset: 5 / 10 = 0.5 s, which is K5. The listing's K20 = 2.0 s covers 10 x 2.0 = 20 counts per interval.

Result. K20 stands, with four times the minimum margin, and a frozen count is caught within about 2 s.

Decision. Any preset from K5 upward works at 3 in/min; keep K20 unless detection must be faster. At a slowest speed of 0.2 in/min the same encoder gives 0.2 / 60 = 0.0033 in/s, and 200 x 0.0033 = 0.67 counts per second, one count every 1.5 s. K20 would then cover 1.3 counts, under the 5-count margin, so raise the preset to 5 / 0.67 = 7.5 s, which is K75, and accept detection within about 7.5 s.

Recommendation: size the preset so every interval covers at least 5 counts at the slowest commanded speed, start at K20 (2.0 s) whenever that speed delivers 10 counts per second or more, and leave C10 latched with the panel reset so the fault survives the scan that found it. Do not wire C10 into the machine stop until the branch tests in the last section pass at that speed.

Enter the logic

Enter the five rungs in the programming software for this PLC family; the mnemonics below are the exported instruction list, and the instruction-set chapter of the PLC user manual documents each timer, one-shot contact and double compare instruction. Get the current manual from the manufacturer or its distributor.

  1. Rung 1, interval timer. STR Y0, ANDN T1, TMR T1 K20, PD C1. With the run command on, T1 times 2.0 s, resets itself and starts again, and C1 closes for one scan at each restart.
  2. Rung 2, snapshot. STR C1, LDD V2000, OUTD V2002. The restart pulse loads the live count and copies it to the sample, so the sample is the count at the start of every interval.
  3. Rung 3, compare. STR T1, LDD V2000, CMPD V2002. Each time T1 finishes, the live count is compared against the sample as one 32-bit value.
  4. Rung 4, alarm. STR T1, AND SP61, SET C10. SP61 is the compare result relay that shows equal, so C10 latches exactly when an interval ended with zero counts. Keep rungs 3 and 4 adjacent: SP61 holds the result of the most recent compare executed in the scan, and a compare placed between the two rungs would hand rung 4 the wrong answer.
  5. Rung 5, reset. STR C100, RST C10.
// Rung 1: run command enables the interval timer; the timer self-resets
STR Y0
ANDN T1
TMR T1 K20
PD C1
// Rung 2: the restart pulse snapshots the live count into the sample
STR C1
LDD V2000
OUTD V2002
// Rung 3: when the timer finishes, compare live count against sample
STR T1
LDD V2000
CMPD V2002
// Rung 4: interval ended with equal samples, so latch the alarm
STR T1
AND SP61
SET C10
// Rung 5: panel reset pushbutton clears the latched alarm
STR C100
RST C10
  1. Panel. Put C10 on an alarm line and give the operator a reset pushbutton writing C100. The panel can also switch itself to a dedicated alarm screen when C10 sets: switch the panel to an alarm screen when a PLC alarm bit turns on shows that setup. If the reset has to silence a horn or mark an acknowledgement as well, map an HMI alarm acknowledge to a PLC bit and keep the two functions on separate bits.

The listing is a reference pattern to adapt, and the two addresses and the run bit must match your configuration as checked above.

How to check it worked

Run the three branch tests in order, and run the third only with the drive isolated and the machine in a safe state.

  1. Run command off. With Y0 off and the count stationary, watch C10 stay off for several minutes. The test must be inert whenever travel is not commanded.
  2. Lowest speed. Command the slowest speed and watch the live count across at least one full interval. It must change by well more than 5 counts, and C10 must stay off through several intervals in a row.
  3. Controlled stopped test. With the drive isolated, force the timer rung's enable with a test bit in place of Y0 so the timer runs while the mechanism stands still. The first completed interval must latch C10. Press the panel reset and confirm C10 clears; with the test bit still forced and the count still frozen, the next interval must latch it again. That last step confirms a reset cannot mask a fault that is still present. Remove the force before production.

Before trusting the panel for any of this, test the link first: verify HMI communications with a PLC heartbeat counter. Exercise the reset write while the machine is safe; the operator panel link setup article on testing writes before motion covers why the write gets tested before anything moves.

Only after all three branches pass, wire C10 into the stop path and test the stop. If production has to run before the stop is wired, treat the unarmed alarm as a known temporary state, tell the operators, and arm it the same shift.

When the alarm sets

  • Mechanism moving, count frozen. The fault is in the count path: encoder coupling or mounting, encoder power or wiring, or the module configuration. A count read from the wrong address looks the same as a dead encoder, so confirm the live value comes from the configured location first.
  • Mechanism stopped, drive commanded. The fault the check exists for: broken belt, failed coupling or a stalled load. Follow the machine's recovery procedure, fix the cause, and treat the reset button as a banner clear once the cause is understood.
  • Alarm during valid slow travel. The interval is too short for the true count rate. Re-run the sizing arithmetic with the real slowest speed and counts per inch, and raise the preset.
  • Alarm clears and returns. Travel is genuinely intermittent while the run command stays on. Gate the timer rung with an in-motion bit so a commanded dwell is not reported as a fault.

Questions

What if the machine dwells with the run command on?

A valid dwell looks identical to a broken belt: run command on, count frozen. Gate the check with an in-motion bit from the machine logic so the interval only times when travel is commanded. Add the in-motion contact in series with Y0 in rung 1, or hold the timer reset through the dwell, and the alarm then reports only commanded motion that never arrives.

Why compare double words instead of two single words?

The count and the sample each occupy two 16-bit V-memory words, and quadrature counts grow fast past a single word's 65,535 limit. The double instructions treat the pair as one 32-bit value. Two single-word compares can also disagree across a carry between the words and set the alarm on a healthy interval, so LDD, OUTD and CMPD are used as a set.

Does a passing check mean the position is accurate?

No. The check watches for count change, so it passes whenever counts arrive, even if every count is wrong. Position accuracy is a different test: command a known travel, compare the reported distance against a measured one, and repeat at both ends of the stroke. Keep the two alarms separate in the panel text so operators never read a count-change alarm as a position fault.

Planning information, not legal or engineering advice. Rules differ by place: check codes and permits with your local authority and your licensed trades.

Keep reading

Build your signAsk for a quote