A momentary function key that latches its PLC bit after a short press points to two panel writers on one address. Remove the duplicate assignment before touching the ladder. A short press against a one second hold separates a duplicate writer from a pulse shorter than one PLC scan.
When a function key set to momentary leaves its PLC bit high after a short press, look for a second writer on that address before you open the ladder. Two panel objects assigned to the same key keep the bit served after release, and a momentary key starts acting like a toggle. The other suspect, a pulse shorter than one PLC scan, shows the opposite signature: the bit never rises at all. One test separates them in under a minute: press briefly and watch the bit, then hold the key and watch again. This piece walks the symptoms, the project checks, the timing math, and the isolation test if both come up clean.
What each symptom points to
The case in this piece: F1 assigned to bit C20 and F2 to bit C21, both set to momentary, F1 setting output Y0 and F2 resetting it. Press F1 briefly and C20 stays high until you press again or hit another key. Hold the key longer and it drops cleanly on release.
Watch the assigned bit in the PLC programming software while you press. The bit's behavior, not the key beep and not the output, picks the fault.
| Symptom at the bit | Fault to suspect | First check |
|---|---|---|
| Rises on a short press and stays high | A second writer holding the address | Count the objects writing that bit in the panel project |
| Latches on a short press but drops cleanly on a hold of about 1 s | The same duplicate writer, its two writes landing differently on longer presses | The same count |
| Never rises; the press only works when held longer | Pulse shorter than one scan | Timing math below; lengthen the ON state |
| Rises and falls in the panel monitor but Y0 never moves | The rung reads a different address than the key writes | Compare the rung's contact address with the key's target |
One press that produces several rises and falls is release bounce, a separate fault with its own fix: why an HMI touch button bounces after release.
Count the writers on the bit
The latching fault is a second writer, and the panel project usually exposes it in minutes. Each assignment method is innocent alone; two together put two tags on one PLC address, and the writes fight.
- Open the panel project and list every object assigned to each function key. The direct function key assignment is the obvious writer.
- Search for a pushbutton object assigned to a function key. It stays a writer even when parked outside the viewable screen area, which is where these objects usually sit.
- Search for the Panel to PLC start address word+1 mapping, the second common way to feed key states into the controller.
- Read the target address of every writer from the live project, not from your notes. Two active methods can carry different targets, and the targets can drift while you experiment.
- Compare the surviving writer's target with the rung that uses the bit, so the contact driving the output is the address the key actually writes.
The fix: one writer per key
Keep one assignment method per function key and remove or disable every other writer on those bits. In the case above the direct function key assignment stayed and the alternates went, and either method alone ran the keys correctly; both together are what made the momentary setting act like a toggle. Re-download the project to the panel before testing.
How to check it worked
Watch the confirmed bit in the PLC programming software, with the project holding one writer per key. A short press gives exactly one rise and one fall. A held press gives the same pair. The set rung acts once on the first key's press and the reset rung once on the second's, and Y0 follows. If the bit rises but Y0 does not move, the rung is reading a different address, so go back to the address comparison in the project search.
Example: a 1 second press against a 50 ms scan
Inputs: the hold that behaves is 1 s, from the case above. The scan period for the worst case is 50 ms, the slow end of the 1–50 ms range where most PLC scans run. The beep-length press has no documented duration, so treat it as shorter than one scan period.
Rule in words: a PLC samples its inputs once per scan. A press is read reliably only if it is still on at a sample point, and any window longer than one scan period contains at least one sample point. A pulse shorter than one scan period can start and finish between two samples, so the CPU never sees it on.
Arithmetic: 1 s = 1000 ms. 1000 ms ÷ 50 ms per scan = 20 scans, so the held press spans at least 20 sample points and the bit reads high at every one. A press shorter than 50 ms can fit whole inside the gap between two samples and produces zero samples.
Result: the 1 s hold registers on any controller in the typical scan range, and a beep-length press is lost whenever it misses the sample window.
Decision: when the bit never rises on short presses, make the ON state outlast one scan period. Hold past 50 ms in the worst case, or set a minimum ON time on the key in the panel project if your software offers one. The threshold moves with the real scan, and by a lot: a controller that reads remote I/O on a 30 s cycle samples inputs once per 30 s, so the ON state must outlast 30 s. Measure the scan before trusting any press length.
What a Positive Differential can do for a short press
A Positive Differential instruction watches a bit in the ladder and holds its output on for exactly one scan after the scan sees a rising edge. Use it when the CPU does sample the press but the downstream logic needs that press as a clean one-scan pulse: the instruction turns the sampled edge into one scan of ON, so the pulse cannot outlive the release.
Its limit is just as exact: it only stretches an edge the scan has already sampled, and an edge that falls whole between two scans never reaches it. That is why it fixes nothing when the bit never rises, and why it cannot pull a bit down while a second writer keeps setting the address. It is also not a high speed input. Catching pulses faster than the scan is a job for the input card's high speed inputs, which need their own setup, not for a ladder instruction.
The one-scan pulse is short in real time: at a mid-range 20 ms scan it lasts 20 ms and is gone before the next scan starts. How long a momentary high survives in scan counts is its own calculation: how many PLC scans an HMI momentary button bit stays on works it through. The same one-scan visibility explains why a pulse the PLC holds for a single scan can still be invisible on a panel that samples slower: why an R_TRIG pulse never shows on the HMI screen covers that side.
Isolate the set and reset rungs if the fault survives
If the project holds one writer per bit and the bit still latches, shrink the program temporarily to the two rungs under suspicion:
- Back up the running PLC program and put the machine in a safe state before anything about execution changes.
- Move the END instruction early so the rest of the ladder does not execute, and place the two test rungs immediately before it: the rung that sets Y0 from the first key's bit and the rung that resets Y0 from the second's.
- Watch both key bits and Y0 while you give each key a short press and a held press.
- Restore the full program immediately after the test.
If the isolated pair behaves, the interference lives in the rest of the program: search every rung that writes Y0 or the key bits and clear the extra writer. If the isolated pair still latches, the writer is still on the panel side, so go back to the project search.
Recommendation
Recommendation: Before editing any ladder logic, open the panel project and leave exactly one writer per function key bit: keep the direct function key assignment, and delete or disable any pushbutton object parked off-screen and any Panel to PLC start address word+1 mapping on the same bits. Verify at the PLC bit afterward, one rise and one fall per press. If the bit still latches with one writer, make the ON state outlast one scan period as worked out in the example above, and measure the real scan first on any controller that reads remote I/O through a slow cycle.
That fix belongs to the machine panel. A standalone notice or status board next to the line is a different screen, bought and mounted separately: our shop-floor signage covers that job.
Questions
How long should a momentary press be so the PLC samples it?
Longer than one scan period. PLC scans typically run 1 to 50 ms, so a press held 100 ms is sampled at least twice even at the slow end, and the 1 s hold used to test the key is comfortable. The threshold moves with your real scan: measure it in the programming software, because a controller that reads remote I/O on a 30 s cycle samples inputs only once per cycle.
Does the key beep confirm the PLC received the press?
No. The beep sounds in the panel when the touch registers, and panel communications run unsynchronized with the PLC scan, so a beep can land on a press the scan never samples. Judge the key at the PLC bit in the programming software: one rise and one fall per press is the pass condition.
Why did the stuck bits differ from the addresses first written down?
Because the second assignment method wrote its own targets. In the scenario the project notes first listed F1 at C20 and F2 at C21, while the bits that actually stayed high were C21 and C22, one position off. When two assignment methods run at once, each carries its own tag addresses, so the bits that stick can be the second method's targets. Read every target address from the live project and keep the one writer whose address matches the rung.
Planning information, not legal or engineering advice. Rules differ by place: check codes and permits with your local authority and your licensed trades.