HMI panel loses its project after a power cycle

Flash keeps its data with the power off; SRAM does not

Flash memory holds its contents with no power connected. Volatile SRAM holds them only while its retention rail stays above roughly 2 V, the data-retention floor printed on standard CMOS SRAM datasheets, and the bits corrupt within milliseconds once the rail falls below it. That single difference explains the whole fault.

Panel manuals draw the same line. One documented HMI line saves changed parameters to SRAM and keeps them through power cycles with a coin cell. PLC families back holding registers, counters and data tables with a battery the same way. Some controllers bridge short outages with a supercapacitor: one PLC family documents a few days of SRAM retention on a charged supercap alone, with the battery removed. The split runs through PLCs too; the S7-300 page on battery-backed RAM versus MMC flash backup shows one controller family holding retentive memory in RAM with a battery while the MMC keeps the program in flash.

So a panel whose project sits in SRAM depends on a coin cell, a holder and a copper path staying intact through every restart, washdown and vibration. A holder contact that opens for 200 ms during restart inrush erases the project and leaves no trace. The same panel with the project in flash shrugs all of it off, which is why panel families offer a flash option on the step-up models. If your manual does not state the memory type, treat the panel as battery-backed and check the battery path before anything else.

Symptoms and what each points to

• Boots to the supplier's default screen or asks for a download after a power cut. The project image was in volatile memory and the retention path failed. Run the checks below before reloading, so the download does not overwrite the evidence.
• The project survives but recipes, counters or stored values reset. Those values sit in the battery-backed retentive area, a separate setting from the project image. List the values that must survive an outage and move them to flash or off-panel storage; storing PLC data on an HMI panel for later retrieval covers the options.
• The screen stays dark or never reaches its startup splash. Power problem first. Measure the supply at the panel terminal before touching the battery.
• It runs for weeks, then one cycle wipes it. An intermittent contact, not a spent cell. A cell at full voltage still loses the project the instant vibration opens the holder.

Checks before you reload

1. Record the symptom. Photograph the boot screen and note exactly which values reset. A download overwrites this evidence.
2. Read the manual for the memory type. Do not infer it from the presence of a battery: flash-based panels still carry a cell for the clock and retentive values.
3. Measure the cell at the holder. A fresh coin cell reads about 3.0 V. Against the roughly 2 V retention floor, replace the cell when it reads below about 2.5 V at the holder, which leaves 0.5 V of margin for contact drop and sag under load.
4. Inspect the holder and its solder joints. Corrosion, a cracked joint or a flattened spring produce exactly the fault a meter cannot see, and they are the most common cause of a one-off wipe.
5. Check for a supercapacitor in the retention circuit. If the design bridges the rail with one, short blips ride out on the capacitor and only longer outages threaten the memory.
6. List the values that must survive an outage and where each one lives: project image, retentive area, or the PLC.

Example: both meter checks pass and the memory still dies

Take one panel that wiped its project during a single restart.

• Holder voltage measures 2.9 V. Fresh is 3.0 V and the retention floor is about 2.0 V, so the cell holds a 0.9 V margin. The cell passes.
• The holder contact has corroded to about 10 kΩ. Retention load for low-power SRAM is on the order of 1 µA, so the drop across the contact is 10,000 Ω × 0.000001 A = 0.01 V, or 10 mV. The holder passes too. With readings like these, no steady-state measurement finds the fault.
• During the restart, vibration opens the same contact for 200 ms. With the contact open, no current holds the rail up; without a dedicated hold-up capacitor the rail falls below the 2 V floor within milliseconds and the project image corrupts.

Result: 2.9 V at the holder, 10 mV of contact drop, a 200 ms break, a wiped project. The deciding check is another meter reading; it is a power cycle under the panel's real conditions, which is what the next section runs.

The fix

1. Clean or replace the holder contacts, then replace the cell with the chemistry and size the manual specifies. Replacing the cell clears the retentive memory, so reload straight afterwards.
2. Reload the approved project by the panel's normal download procedure and confirm the retained values. If the download fails after the reboot, work through fixing an HMI project restore that fails after reboot.
3. Verify operation: startup screen, navigation, and every machine function the panel starts or stops.
4. Then prove retention with the test below. A reload that sticks through one shift is recovery; the cycle test is what justifies release.

The controlled power-cycle test

Run it during planned downtime: if the panel starts or stops a running machine, a wipe during the test stops the machine with it.

1. Load the approved project and set the retained values.
2. Remove panel power with the normal disconnect for 30 s, then restore. Leave the battery and its connector untouched throughout.
3. Compare the startup screen and retained values with the pre-test state and write the result down.
4. Repeat with 5 min off, then 10 min off. Three cycles in total.
5. Log the panel's model, memory type, battery voltage and the three results, so a repeat case at another machine can be compared against this one.

If all three cycles retain, release the panel. If any cycle wipes the project with the battery undisturbed, stop cycling: the retention path has a fault the meter cannot see, and the panel comes off the machine for a holder and cell replacement or a bench diagnosis. Fixed off-intervals keep the test repeatable; the P2K retentive values page on the controlled power-cycle test sets out the same reasoning for releasing a controller after a retentive-memory fix.

The decision for each case

Recommendation: For any panel whose project sits in battery-backed SRAM, keep a dated project backup at the machine and replace the coin cell on the schedule the manual prints. After one unexplained wipe, clean or replace the holder, reload, and pass three controlled cycles at 30 s, 5 min and 10 min off before release. If the panel wipes again with its battery undisturbed, move that machine to a flash-based panel, and standardize new installs on flash wherever the family offers it.

Questions